ISSN 2394-5125
 

Research Article 


LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S.

Abstract
Time-to-digital converters (TDCs) are used as fundamental building blocks in a variety of fields like, digital communication, high-energy physics, Time of Flights (TOF)measurements, biomedical imaging and measurement instrumentation systems. Implementing TDCs in field-programmable gate arrays (FPGAs) has attractive benefits of shorter development Cycle and very less development cost than the ASIC approach. It also offers programming flexibility, which is useful to survive with unpredicted problems and changes in the experimental conditions. We present a low power TDC implemented in a low cost Spartan 3E FPGA device. The converter is based on two level interpolation, in the first level, we used Gray code counter as a coarse counter and a matrices of D Flipflops as a fine interpolation stage. The power consumption of our TDC for a bin size of 5 is 40mw at 500MHz clock frequency.

Key words: FPGA, TDC, TOF, Digital Communication, measurement instrumentation systems.


 
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How to Cite this Article
Pubmed Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. JCR. 2020; 7(4): 1543-1548. doi:10.31838/jcr.07.04.259


Web Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. http://www.jcreview.com/?mno=99575 [Access: May 31, 2021]. doi:10.31838/jcr.07.04.259


AMA (American Medical Association) Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. JCR. 2020; 7(4): 1543-1548. doi:10.31838/jcr.07.04.259



Vancouver/ICMJE Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. JCR. (2020), [cited May 31, 2021]; 7(4): 1543-1548. doi:10.31838/jcr.07.04.259



Harvard Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S (2020) LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. JCR, 7 (4), 1543-1548. doi:10.31838/jcr.07.04.259



Turabian Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. 2020. LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. Journal of Critical Reviews, 7 (4), 1543-1548. doi:10.31838/jcr.07.04.259



Chicago Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. "LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER." Journal of Critical Reviews 7 (2020), 1543-1548. doi:10.31838/jcr.07.04.259



MLA (The Modern Language Association) Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S. "LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER." Journal of Critical Reviews 7.4 (2020), 1543-1548. Print. doi:10.31838/jcr.07.04.259



APA (American Psychological Association) Style

Latha P, Gayathri M, Bernice Dainty J, Battu Mounika, Priyanga S (2020) LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER. Journal of Critical Reviews, 7 (4), 1543-1548. doi:10.31838/jcr.07.04.259