ISSN 2394-5125
 

Research Article 


LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH.

Abstract
ABSTRACT: In this paper the efficient VLSI implementation of sequential finite field multiplier based on
Adiabatic logic using GDI. The main intent of sequential finite field multiplier is to perform the multiplication
operation and shift the bits. Here first input is converted into finite field domain and after that finite field
multiplication process is performed. In the proposed architecture partial products are used to generate propagate
and generate signals. Multiplicand register and multiplier registers are used to perform the operation in effective
way. Adiabatic logic using GDI plays major role in entire system. Hence compared to existed system, proposed
system gives effective output.

Key words: KEYWORDS: Finite field multiplier, finite field domain, multiplier register, multiplicand register, finite field arithmetic circuit, Sequential Finite Filed Multiplier (SFFM).


 
ARTICLE TOOLS
Abstract
PDF Fulltext
How to cite this articleHow to cite this article
Citation Tools
Related Records
 Articles by GOLLA. SWAPNA
Articles by RAMAKRISHNA REDDY EAMANI
Articles by POTHUNURI SURYANARAYANA
Articles by Dr. B. NANCHARAIAH
on Google
on Google Scholar


How to Cite this Article
Pubmed Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. JCR. 2020; 7(16): 2197-2203. doi:10.31838/jcr.07.16.277


Web Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. http://www.jcreview.com/?mno=98881 [Access: April 17, 2021]. doi:10.31838/jcr.07.16.277


AMA (American Medical Association) Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. JCR. 2020; 7(16): 2197-2203. doi:10.31838/jcr.07.16.277



Vancouver/ICMJE Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. JCR. (2020), [cited April 17, 2021]; 7(16): 2197-2203. doi:10.31838/jcr.07.16.277



Harvard Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH (2020) LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. JCR, 7 (16), 2197-2203. doi:10.31838/jcr.07.16.277



Turabian Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. 2020. LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. Journal of Critical Reviews, 7 (16), 2197-2203. doi:10.31838/jcr.07.16.277



Chicago Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. "LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI." Journal of Critical Reviews 7 (2020), 2197-2203. doi:10.31838/jcr.07.16.277



MLA (The Modern Language Association) Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH. "LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI." Journal of Critical Reviews 7.16 (2020), 2197-2203. Print. doi:10.31838/jcr.07.16.277



APA (American Psychological Association) Style

GOLLA. SWAPNA, RAMAKRISHNA REDDY EAMANI, POTHUNURI SURYANARAYANA, Dr. B. NANCHARAIAH (2020) LOW COMPLEXITY AND EFFICIENT VLSI IMPLEMENTATION OF SFFM BASED ON ADIABATIC LOGIC USING GDI. Journal of Critical Reviews, 7 (16), 2197-2203. doi:10.31838/jcr.07.16.277