ISSN 2394-5125
 

Research Article 


COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE

VIJAYALAKSHMI CH, P. A. LOVIN.

Abstract
Adiabatic circuits are low power circuits, which oversees the reversible method of reasoning that it stores the
power and gives it back again. At present Several Adiabatic methodologies have been gotten for viable power
dispersal. The system used to restrain control dispersing are Efficient Charge Recovery Logic, Positive
Feedback Adiabatic Logic, and Pass Transistor Logic. The Adiabatic method is essentially cast-off for
decreasing the influence dissipating in VLSI tracks, which does indict and squaring system. The method of
reasoning doors accepts a critical activity in various number shuffling assignments, for instance, the twisted,
multiplier, divider and processors. To compile the power spread, a profitable full adder proposed for the
particular adiabatic methods, and all of the circuits have been simulated by 25nm innovation utilizing the tanner
EDA tool

Key words: Adiabatic logic, Low power dissipation, Efficient Charge Recovery Logic, Positive Feedback Adiabatic logic, Pass Transistor Logic, Low power Adder


 
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Pubmed Style

VIJAYALAKSHMI CH, P. A. LOVIN. COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. JCR. 2020; 7(17): 2829-2835. doi:10.31838/jcr.07.17.355


Web Style

VIJAYALAKSHMI CH, P. A. LOVIN. COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. http://www.jcreview.com/?mno=112232 [Access: May 30, 2021]. doi:10.31838/jcr.07.17.355


AMA (American Medical Association) Style

VIJAYALAKSHMI CH, P. A. LOVIN. COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. JCR. 2020; 7(17): 2829-2835. doi:10.31838/jcr.07.17.355



Vancouver/ICMJE Style

VIJAYALAKSHMI CH, P. A. LOVIN. COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. JCR. (2020), [cited May 30, 2021]; 7(17): 2829-2835. doi:10.31838/jcr.07.17.355



Harvard Style

VIJAYALAKSHMI CH, P. A. LOVIN (2020) COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. JCR, 7 (17), 2829-2835. doi:10.31838/jcr.07.17.355



Turabian Style

VIJAYALAKSHMI CH, P. A. LOVIN. 2020. COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. Journal of Critical Reviews, 7 (17), 2829-2835. doi:10.31838/jcr.07.17.355



Chicago Style

VIJAYALAKSHMI CH, P. A. LOVIN. "COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE." Journal of Critical Reviews 7 (2020), 2829-2835. doi:10.31838/jcr.07.17.355



MLA (The Modern Language Association) Style

VIJAYALAKSHMI CH, P. A. LOVIN. "COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE." Journal of Critical Reviews 7.17 (2020), 2829-2835. Print. doi:10.31838/jcr.07.17.355



APA (American Psychological Association) Style

VIJAYALAKSHMI CH, P. A. LOVIN (2020) COMPREHENSIVE ANALYSIS OF POWER DISSIPATION IN LOGIC GATES BY USING ADIABATIC TECHNIQUE. Journal of Critical Reviews, 7 (17), 2829-2835. doi:10.31838/jcr.07.17.355