ISSN 2394-5125
 

Research Article 


CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY

A.Beno, S. Darwin, A. Albert Raj.

Abstract
A new pipeline-SAR ADC structure without residue amplifier and timing-interleaving (TI) is
offered on this short. Two redistribution DACs and comparators are followed in two degrees, with DAC1 for
MSB comparisons and DAC2 for LSB comparisons. The preceding sampled signal is transferred from DAC1 to
DAC2 via charge sharing, in order that preceding LSB conversions can function concurrently with the next
sample and MSB conversions, which increases the conversion pace. With 0.Five scale factor between two stages
and multi comparator offsets, offset calibration must be obtained to remove offset nonlinearity. The quantity of
conversion cycles required with the aid of the proposed layout is simplest 6 and sampling requires no greater
time, which is 3 cycles fewer than traditional SAR ADC. The behavioral version of 8b proposed design proves
the performance balance with parasitic capacitance variation, capacitor mismatch, offset, and noise errors.

Key words: analog-to-digital converter (SAR ADC), Continuous-time feedforward cascaded (CTFC),gain-bandwidth product (GBW)


 
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Pubmed Style

A.Beno, S. Darwin, A. Albert Raj. CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. JCR. 2020; 7(17): 2807-2811. doi:10.31838/jcr.07.17.351


Web Style

A.Beno, S. Darwin, A. Albert Raj. CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. http://www.jcreview.com/?mno=103642 [Access: August 17, 2021]. doi:10.31838/jcr.07.17.351


AMA (American Medical Association) Style

A.Beno, S. Darwin, A. Albert Raj. CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. JCR. 2020; 7(17): 2807-2811. doi:10.31838/jcr.07.17.351



Vancouver/ICMJE Style

A.Beno, S. Darwin, A. Albert Raj. CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. JCR. (2020), [cited August 17, 2021]; 7(17): 2807-2811. doi:10.31838/jcr.07.17.351



Harvard Style

A.Beno, S. Darwin, A. Albert Raj (2020) CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. JCR, 7 (17), 2807-2811. doi:10.31838/jcr.07.17.351



Turabian Style

A.Beno, S. Darwin, A. Albert Raj. 2020. CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. Journal of Critical Reviews, 7 (17), 2807-2811. doi:10.31838/jcr.07.17.351



Chicago Style

A.Beno, S. Darwin, A. Albert Raj. "CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY." Journal of Critical Reviews 7 (2020), 2807-2811. doi:10.31838/jcr.07.17.351



MLA (The Modern Language Association) Style

A.Beno, S. Darwin, A. Albert Raj. "CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY." Journal of Critical Reviews 7.17 (2020), 2807-2811. Print. doi:10.31838/jcr.07.17.351



APA (American Psychological Association) Style

A.Beno, S. Darwin, A. Albert Raj (2020) CMOS REALIZATION OF AN AMPLIFIER-FREE PIPELINE-SAR ADC ARCHITECTURE WITH 90nm TECHNOLOGY. Journal of Critical Reviews, 7 (17), 2807-2811. doi:10.31838/jcr.07.17.351