ISSN 2394-5125
 

Research Article 


FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary.

Abstract
In this work, we are going to design a memory using Verilog programming in Vivado 2018.3 Integrated Development Environment and implement it on Kintex UltraScale+ FPGA. In order to make it green, we are reducing power dissipation of our design using power supply settings of UltraScale FPGA that support a dual-voltage operation of the primary core fabric. Operating Voltage (VCCINT) of 7 Series (28nm) VNOM, UltraScale (20nm) VNOM, UltraScale+ (16nm) VNOM, and UltraScale+ (16nm) VLOW are 1V, 0.95V, 0.85V, and 0.72V respectively. In our work, we are 0.873 V operating voltage and compare its power dissipation with power dissipation by 0.9V and 0.928 V operating voltage. There is 2.87-6.42 % reduction in power dissipation when we scale down supply voltage from 0.928 V to 0.873 V.

Key words: Ultrascale+ FPGA, Green Design, Memory, FSM, EDA Implementation, Verilog


 
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Pubmed Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. JCR. 2020; 7(19): 454-458. doi:10.31838/jcr.07.19.59


Web Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. http://www.jcreview.com/?mno=102163 [Access: July 15, 2020]. doi:10.31838/jcr.07.19.59


AMA (American Medical Association) Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. JCR. 2020; 7(19): 454-458. doi:10.31838/jcr.07.19.59



Vancouver/ICMJE Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. JCR. (2020), [cited July 15, 2020]; 7(19): 454-458. doi:10.31838/jcr.07.19.59



Harvard Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary (2020) FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. JCR, 7 (19), 454-458. doi:10.31838/jcr.07.19.59



Turabian Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. 2020. FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. Journal of Critical Reviews, 7 (19), 454-458. doi:10.31838/jcr.07.19.59



Chicago Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. "FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA." Journal of Critical Reviews 7 (2020), 454-458. doi:10.31838/jcr.07.19.59



MLA (The Modern Language Association) Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary. "FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA." Journal of Critical Reviews 7.19 (2020), 454-458. Print. doi:10.31838/jcr.07.19.59



APA (American Psychological Association) Style

Bishwajeet Pandey, Rajina R Mohamed, Geetam S Tomar, D M Akbar Hussain, Yousef A Baker El-Biary (2020) FSM BASED GREEN MEMORY DESIGN AND ITS IMPLEMENTATION ON ULTRASCALE PLUS FPGA. Journal of Critical Reviews, 7 (19), 454-458. doi:10.31838/jcr.07.19.59





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